Pin Description 8086
8086 was the first 16-bit microprocessor
available in 40-pin DIP (Dual Inline Package) chip. Let us now discuss in
detail the pin configuration of a 8086 Microprocessor.
Power supply and frequency signals
It uses 5V DC supply at VCC pin
40, and uses ground at VSS pin 1 and 20 for its operation.
Clock signal is provided through Pin-19. It
provides timing to the processor for operations. Its frequency is different for
different versions, i.e. 5MHz, 8MHz and 10MHz.
Address/data bus
AD0-AD15. These are 16 address/data bus. AD0-AD7
carries low order byte data and AD8AD15 carries higher order byte data. During
the first clock cycle, it carries 16-bit address and after that it carries
16-bit data.
Address/status bus
A16-A19/S3-S6. These are the 4 address/status
buses. During the first clock cycle, it carries 4-bit address and later it
carries status signals.
S7/BHE
BHE stands for Bus High Enable. It is available
at pin 34 and used to indicate the transfer of data using data bus D8-D15. This
signal is low during the first clock cycle, thereafter it is active.
Read ($\overline {RD}$)
It is available at pin 32 and is used to read
signal for Read operation.
Ready
It is available at pin 22. It is an
acknowledgement signal from I/O devices that data is transferred. It is an
active high signal. When it is high, it indicates that the device is ready to
transfer data. When it is low, it indicates wait state.
It is available at pin 21 and is used to restart
the execution. It causes the processor to immediately terminate its present
activity. This signal is active high for the first 4 clock cycles to RESET the
microprocessor.
It is available at pin 18. It is an interrupt
request signal, which is sampled during the last clock cycle of each
instruction to determine if the processor considered this as an interrupt or
not.
It stands for non-maskable interrupt and is
available at pin 17. It is an edge triggered input, which causes an interrupt
request to the microprocessor.
$\overline {TEST}$
This signal is like wait state and is available
at pin 23. When this signal is high, then the processor has to wait for IDLE
state, else the execution continues.
MN/$\overline {MX}$
It stands for Minimum/Maximum and is available
at pin 33. It indicates what mode the processor is to operate in; when it is
high, it works in the minimum mode and vice-aversa.
INTA
It is an interrupt acknowledgement signal and id
available at pin 24. When the microprocessor receives this signal, it
acknowledges the interrupt.
ALE
It stands for address enable latch and is
available at pin 25. A positive pulse is generated each time the processor
begins any operation. This signal indicates the availability of a valid address
on the address/data lines.
DEN
It stands for Data Enable and is available at
pin 26. It is used to enable Transreceiver 8286. The transreceiver is a device
used to separate data from the address/data bus.
DT/R
It stands for Data Transmit/Receive signal and
is available at pin 27. It decides the direction of data flow through the
transreceiver. When it is high, data is transmitted out and vice-a-versa.
M/IO
This signal is used to distinguish between
memory and I/O operations. When it is high, it indicates I/O operation and when
it is low indicates the memory operation. It is available at pin 28.
WR
It stands for write signal and is available at
pin 29. It is used to write the data into the memory or the output device
depending on the status of M/IO signal.
HLDA
It stands for Hold Acknowledgement signal and is
available at pin 30. This signal acknowledges the HOLD signal.
HOLD
This signal indicates to the processor that
external devices are requesting to access the address/data buses. It is
available at pin 31.
QS1 and QS0
These are queue status signals and are available
at pin 24 and 25. These signals provide the status of instruction queue. Their
conditions are shown in the following table −
|
QS0 |
QS1 |
Status |
|
0 |
0 |
No operation |
|
0 |
1 |
First byte of opcode from the
queue |
|
1 |
0 |
Empty the queue |
|
1 |
1 |
Subsequent byte from the queue |
S0, S1, S2
These are the status signals that provide the
status of operation, which is used by the Bus Controller 8288 to generate
memory & I/O control signals. These are available at pin 26, 27, and 28.
Following is the table showing their status −
|
S2 |
S1 |
S0 |
Status |
|
0 |
0 |
0 |
Interrupt acknowledgement |
|
0 |
0 |
1 |
I/O Read |
|
0 |
1 |
0 |
I/O Write |
|
0 |
1 |
1 |
Halt |
|
1 |
0 |
0 |
Opcode fetch |
|
1 |
0 |
1 |
Memory read |
|
1 |
1 |
0 |
Memory write |
|
1 |
1 |
1 |
Passive |
When this signal is active, it indicates to the
other processors not to ask the CPU to leave the system bus. It is activated
using the LOCK prefix on any instruction and is available at pin 29.
RQ/GT1 and RQ/GT0
These are the Request/Grant signals used by the
other processors requesting the CPU to release the system bus. When the signal
is received by CPU, then it sends acknowledgment. RQ/GT0 has a
higher priority than RQ/GT1.
The 8086 microprocessor supports 8 types of
instructions −
- Data Transfer Instructions
- Arithmetic Instructions
- Bit Manipulation Instructions
- String Instructions
- Program Execution Transfer Instructions (Branch &
Loop Instructions)
- Processor Control Instructions
- Iteration Control Instructions
- Interrupt Instructions
Let us now discuss these instruction sets in
detail.
Data Transfer Instructions
These instructions are used to transfer the data
from the source operand to the destination operand. Following are the list of
instructions under this group −
Instruction to transfer a word
·
MOV − Used to copy the byte or word from the
provided source to the provided destination.
·
PPUSH − Used to put a word at the top of the
stack.
·
POP − Used to get a word from the top of the
stack to the provided location.
·
PUSHA − Used to put all the registers into the
stack.
·
POPA − Used to get words from the stack to all
registers.
·
XCHG − Used to exchange the data from two
locations.
·
XLAT − Used to translate a byte in AL using a
table in the memory.
Instructions for input and output port transfer
·
IN − Used to read a byte or word from the
provided port to the accumulator.
·
OUT − Used to send out a byte or word from the
accumulator to the provided port.
Instructions to transfer the address
·
LEA − Used to load the address of operand into
the provided register.
·
LDS − Used to load DS register and other
provided register from the memory
·
LES − Used to load ES register and other
provided register from the memory.
Instructions to transfer flag registers
·
LAHF − Used to load AH with the low byte of the
flag register.
·
SAHF − Used to store AH register to low byte of
the flag register.
·
PUSHF − Used to copy the flag register at the
top of the stack.
·
POPF − Used to copy a word at the top of the
stack to the flag register.
Arithmetic Instructions
These instructions are used to perform
arithmetic operations like addition, subtraction, multiplication, division,
etc.
Following is the list of instructions under this
group −
Instructions to perform addition
·
ADD − Used to add the provided byte to
byte/word to word.
·
ADC − Used to add with carry.
·
INC − Used to increment the provided byte/word
by 1.
·
AAA − Used to adjust ASCII after addition.
·
DAA − Used to adjust the decimal after the
addition/subtraction operation.
Instructions to perform subtraction
·
SUB − Used to subtract the byte from byte/word
from word.
·
SBB − Used to perform subtraction with borrow.
·
DEC − Used to decrement the provided byte/word
by 1.
·
NPG − Used to negate each bit of the provided
byte/word and add 1/2’s complement.
·
CMP − Used to compare 2 provided byte/word.
·
AAS − Used to adjust ASCII codes after
subtraction.
·
DAS − Used to adjust decimal after
subtraction.
Instruction to perform multiplication
·
MUL − Used to multiply unsigned byte by
byte/word by word.
·
IMUL − Used to multiply signed byte by
byte/word by word.
·
AAM − Used to adjust ASCII codes after
multiplication.
Instructions to perform division
·
DIV − Used to divide the unsigned word by byte
or unsigned double word by word.
·
IDIV − Used to divide the signed word by byte
or signed double word by word.
·
AAD − Used to adjust ASCII codes after
division.
·
CBW − Used to fill the upper byte of the word
with the copies of sign bit of the lower byte.
·
CWD − Used to fill the upper word of the
double word with the sign bit of the lower word.
Bit Manipulation Instructions
These instructions are used to perform
operations where data bits are involved, i.e. operations like logical, shift,
etc.
Following is the list of instructions under this
group −
Instructions to perform logical operation
·
NOT − Used to invert each bit of a byte or
word.
·
AND − Used for adding each bit in a byte/word
with the corresponding bit in another byte/word.
·
OR − Used to multiply each bit in a byte/word
with the corresponding bit in another byte/word.
·
XOR − Used to perform Exclusive-OR operation
over each bit in a byte/word with the corresponding bit in another byte/word.
·
TEST − Used to add operands to update flags,
without affecting operands.
Instructions to perform shift operations
·
SHL/SAL − Used to shift bits of a byte/word
towards left and put zero(S) in LSBs.
·
SHR − Used to shift bits of a byte/word
towards the right and put zero(S) in MSBs.
·
SAR − Used to shift bits of a byte/word
towards the right and copy the old MSB into the new MSB.
Instructions to perform rotate operations
·
ROL − Used to rotate bits of byte/word towards
the left, i.e. MSB to LSB and to Carry Flag [CF].
·
ROR − Used to rotate bits of byte/word towards
the right, i.e. LSB to MSB and to Carry Flag [CF].
·
RCR − Used to rotate bits of byte/word towards
the right, i.e. LSB to CF and CF to MSB.
·
RCL − Used to rotate bits of byte/word towards
the left, i.e. MSB to CF and CF to LSB.
String Instructions
String is a group of bytes/words and their
memory is always allocated in a sequential order.
Following is the list of instructions under this
group −
·
REP − Used to repeat the given instruction
till CX ≠ 0.
·
REPE/REPZ − Used to repeat the given instruction
until CX = 0 or zero flag ZF = 1.
·
REPNE/REPNZ − Used to repeat the given instruction
until CX = 0 or zero flag ZF = 1.
·
MOVS/MOVSB/MOVSW − Used to move the byte/word from one
string to another.
·
COMS/COMPSB/COMPSW − Used to compare two string bytes/words.
·
INS/INSB/INSW − Used as an input string/byte/word from
the I/O port to the provided memory location.
·
OUTS/OUTSB/OUTSW − Used as an output string/byte/word from
the provided memory location to the I/O port.
·
SCAS/SCASB/SCASW − Used to scan a string and compare its
byte with a byte in AL or string word with a word in AX.
·
LODS/LODSB/LODSW − Used to store the string byte into AL or
string word into AX.
Program Execution Transfer Instructions (Branch and Loop
Instructions)
These instructions are used to transfer/branch
the instructions during an execution. It includes the following instructions −
Instructions to transfer the instruction during
an execution without any condition −
·
CALL − Used to call a procedure and save their
return address to the stack.
·
RET − Used to return from the procedure to the
main program.
·
JMP − Used to jump to the provided address to
proceed to the next instruction.
Instructions to transfer the instruction during
an execution with some conditions −
·
JA/JNBE − Used to jump if above/not below/equal
instruction satisfies.
·
JAE/JNB − Used to jump if above/not below
instruction satisfies.
·
JBE/JNA − Used to jump if below/equal/ not above
instruction satisfies.
·
JC − Used to jump if carry flag CF = 1
·
JE/JZ − Used to jump if equal/zero flag ZF = 1
·
JG/JNLE − Used to jump if greater/not less
than/equal instruction satisfies.
·
JGE/JNL − Used to jump if greater than/equal/not
less than instruction satisfies.
·
JL/JNGE − Used to jump if less than/not greater
than/equal instruction satisfies.
·
JLE/JNG − Used to jump if less than/equal/if not
greater than instruction satisfies.
·
JNC − Used to jump if no carry flag (CF = 0)
·
JNE/JNZ − Used to jump if not equal/zero flag ZF =
0
·
JNO − Used to jump if no overflow flag OF = 0
·
JNP/JPO − Used to jump if not parity/parity odd PF
= 0
·
JNS − Used to jump if not sign SF = 0
·
JO − Used to jump if overflow flag OF = 1
·
JP/JPE − Used to jump if parity/parity even PF =
1
·
JS − Used to jump if sign flag SF = 1
Processor Control Instructions
These instructions are used to control the
processor action by setting/resetting the flag values.
Following are the instructions under this group
−
·
STC − Used to set carry flag CF to 1
·
CLC − Used to clear/reset carry flag CF to 0
·
CMC − Used to put complement at the state of
carry flag CF.
·
STD − Used to set the direction flag DF to 1
·
CLD − Used to clear/reset the direction flag
DF to 0
·
STI − Used to set the interrupt enable flag to
1, i.e., enable INTR input.
·
CLI − Used to clear the interrupt enable flag
to 0, i.e., disable INTR input.
Iteration Control Instructions
These instructions are used to execute the given
instructions for number of times. Following is the list of instructions under
this group −
·
LOOP − Used to loop a group of instructions
until the condition satisfies, i.e., CX = 0
·
LOOPE/LOOPZ − Used to loop a group of instructions
till it satisfies ZF = 1 & CX = 0
·
LOOPNE/LOOPNZ − Used to loop a group of instructions
till it satisfies ZF = 0 & CX = 0
·
JCXZ − Used to jump to the provided address if
CX = 0
Interrupt Instructions
These instructions are used to call the
interrupt during program execution.
· INT − Used to interrupt the program during
execution and calling service specified.
·
INTO − Used to interrupt the program during
execution if OF = 1
·
IRET − Used to return from interrupt service to
the main program
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